Warning: session_start(): open(/var/cpanel/php/sessions/ea-php56/sess_6cf954af0b3cea0e7e977b56da3a817f, O_RDWR) failed: No such file or directory (2) in /home/snscourseware/public_html/ct.snscourseware.org/syllabus.php on line 2

Warning: session_start(): Failed to read session data: files (path: /var/cpanel/php/sessions/ea-php56) in /home/snscourseware/public_html/ct.snscourseware.org/syllabus.php on line 2
Connected successfully
Warning: Undefined variable $hostname in /home/snscourseware/public_html/ct.snscourseware.org/syllabus.php on line 18
Syllabus || SNS Courseware
Subject Details
Dept     : EEE
Sem      : 3
Regul    : R2023
Faculty : Dr. R. Senthil Kumar
phone  : NIL
E-mail  : senkumar.r.eee@snsct.org
246
Page views
18
Files
1
Videos
2
R.Links

Icon
Syllabus

UNIT
1
MINIMIZATION TECHNIQUES AND GATES

Boolean Algebra: Postulates and Laws , De-morgan’s theorem and Principle of Duality – SOP and POS, K-Map, Tabulation Method, Don’t Care Conditions. Digital Logic Gates: Logic Gates , Adders , Subtractors , Multiplexer and De-multiplexer , Encoder and Decoder circuits.

UNIT
2
DESIGN OF COMBINATIONAL AND FLIP FLOPS

Design of Combinational Circuits: Code Converters - Binary to Gray, Gray to Binary, Excess3 to BCD, BCD to Excess 3, 2 bit Magnitude Comparator. SR Latch, Flip Flops: SR , JK , D ,T - Characteristic Table and Equation - Edge and Level Triggering

UNIT
3
Design of Combinational Circuits: Code Converters - Binary to Gray, Gray to Binary, Excess3 to BCD,

Design of Sequential circuits: Synchronous Counters, Modulo–n Counters, 3 Bit Up/Down Counter. PLDs: Programmable Logic Devices –RAM, ROM, PAL, PLA, FPGA –implementation of design thinking in PLDs. Verilog HDL: Simple codes – implementation of digital functions

UNIT
4
OPERATIONAL AMPLIFIER

Ideal OPAMP characteristics, DC performance characteristics, Inverting and Non Inverting Amplifier, Basic applications of OPAMP: Scale Changer and Phase Shift Circuits, Summer, Integrator and Differentiator, V/I and I/V converters, clipper and clamper, peak detector and S/H circuit

UNIT
5
APPLICATIONS OF OPERATIONAL AMPLIFIER AND TIMERS

Instrumentation amplifier, D/A converter (R-2R Ladder type, weighted resistor type), A/D converters using OP AMP (Flash type, Successive approximation type, Dual slope type) IC 555 Timer circuit, Functional block, Characteristics & Case study applications

Reference Book:

Gray and Meyer, “Analysis and Design of Analog Integrated Circuits”, Wiley International, 2015. Ramakant A.Gayakwad, “OP-AMP and Linear ICs”, Prentice Hall / Pearson Education, 4th Edition, 2017. S.Salivahanan and S. Arivazhagan, “Digital Circuits and Design”, 3rd Edition, Vikas Publishing House Pvt. Ltd, New Delhi, 2016. Charles H.Roth. “Fundamentals of Logic Design”, 6thedition, Thomson Learning, 2014. John. M Yarbrough, “Digital Logic Applications and Design”, Thomson Learning, 2017.

Text Book:

M. Morris Mano, “Digital Design”, 4th Edition, Prentice Hall of India Pvt. Ltd., 2019. D.Roy Choudhry, Shail Jain, “Linear Integrated Circuits”, New Age International Pvt. Ltd., 2017.