THEORY: Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem - Minimization of Boolean expressions - Minterm – Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization – Don’t care conditions. Tabulation method. Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive-OR and Exclusive- NOR PRACTICAL: Implementation of Logic Gates - AND, OR, NOT, NAND, NOR, Exclusive-OR and Exclusive- NOR

THEORY: Half Adder – Full Adder – Half Subtractor – Full Subtractor –Multiplexer/ Demultiplexer – Decoder /Encoder – Parity checker – Parity generators – Code converters: Binary to Gray and Gray to binary- Magnitude Comparator. PRACTICAL: 1. Design and implementation of Adder and Subtractor using logic gates. 2. Design and implementation of code converters using logic gates 3. Design and implementation of encoder and decoder. 4. Design and implementation of Multiplexer and Demultiplexer

THEORY: Latches, Flip flops:SR, JK, T, D– Characteristic table and equation, Counters: Synchronous counters, up/down counter, Modulo–n counter, Decade counters. PRACTICAL: Design and implementation of synchronous counters

THEORY: Register, Shift registers-SISO, SIPO, PISO, PIPO, Classification of sequential circuits: Moore and Mealy, Design of synchronous sequential circuits, State diagram, State table, State minimization, State assignment, Introduction to Hazards: Static, Dynamic. PRACTICAL: Implementation of SISO, SIPO, PISO and PIPO shift registers using Flip- flops.

THEORY: Memories: ROM, PROM, EEPROM, RAM, Programmable Logic Devices: Programmable Logic Array (PLA), Programmable Array Logic (PAL), Implementation of combinational logic using Verilog HDL PRACTICAL: Simulation of combinational circuits using Verilog Hardware Description Language.