THEORY CMOS fabrication – p-well process, n-well process, twin-tub process, MOS transistor theory-IV characteristics, CV characteristics, Non-ideal IV effects, CMOS inverter –DC characteristics, Stick diagram, Layout diagrams. PRACTICAL Schematic Entry and TANNER simulation of CMOS inverter, CMOS NAND and NOR Gates.

THEORY Examples of Combinational Logic Design, Pass transistor Logic, Transmission gates, Pseudo NMOS logic-static and dynamic CMOS design, Domino Logic, Power dissipation, Low power design principles. PRACTICAL Schematic Entry and TANNER simulation of Transmission gate, Pass transistor logic and Domino logic circuits.

THEORY Static and Dynamic Latches and Registers, Timing issues, pipelines, clock strategies, Low power memory circuits, Synchronous design and Asynchronous. PRACTICAL Schematic Entry and TANNER simulation of Synchronous and Asynchronous design-CMOS Latches and Flip flops.

THEORY VLSI testing -need for testing, manufacturing test principles, design strategies for test, Design for testability- BIST-chip level and system level test techniques. PRACTICAL FPGA implementations of Adder, Subtractor and Multiplier.

THEORY Basic concepts- identifiers- gate primitives, gate delays, operators, timing controls, procedural assignments conditional statements, Design hierarchies, Behavioral and RTL modeling, Test benches, Examples: decoder, equality detector, comparator, priority encoder, full adder, Ripple carry adder and D flip flop. PRACTICAL Synthesize and implement Combinational and Sequential Circuits in VERILOG / VHDL